Recently, there is a demand for downsizing a semiconductor device that is used for a portable electronic device such as a mobile phone or a nonvolatile record media of an IC memory card. A wafer level package (CSP) is being developed in an art where a semiconductor device is downsized.
A flip chip ball grid array (FC-BGA) is used in a conventional art of the wafer level package. A plurality of semiconductor chips are flip-chip mounted on a glass epoxy substrate and the semiconductor chips are resin-sealed with molding using an epoxy resin in order to manufacture semiconductor devices of the wafer level package. After that, an outer connection electrode such as a solder ball is connected to the glass epoxy substrate. And each of the semiconductor chips is cut off with dicing. With the manufacturing method, the wafer level package is manufactured. In accordance with the manufacturing method, a quantity of the semiconductor chips to be mounted gets larger as an area of the glass epoxy substrate gets larger. A manufacturing cost of the semiconductor device may be therefore reduced because the quantity of the semiconductor chips that are cut off with one dicing gets larger.
Japanese Patent Application Publication No. 2001-250902 (hereinafter referred to as Document 1) discloses a wafer level package in which a semiconductor chip is implanted in a ceramics substrate having a recess and a redistribution layer (RDL) is formed on the semiconductor chip. The invention disclosed in Document 1 is characterized in that the ceramics substrate having the recess is used instead of the glass epoxy substrate.
Japanese Patent Application Publication No. 2004-221417 (hereinafter referred to as Document 2) discloses a wafer level package in which a sheet-shaped insulating film having an opening according to the size of the semiconductor chip is used, the semiconductor chip is implanted in the opening, and a redistribution layer is formed on the semiconductor chip. The invention disclosed in Document 2 is characterized in that the sheet-shaped insulating film having the opening is used instead of the glass epoxy substrate and the outer connection electrode is connected to the semiconductor chip through two redistribution layers.
In accordance with the manufacturing method of the conventional art, the glass epoxy substrate may be warped because of heat generated during molding, if a large area glass epoxy substrate is used. A yield ratio of the semiconductor device may be reduced, because a problem is made in reliability of the semiconductor device when the glass epoxy substrate is warped. It is therefore difficult to use the large area glass epoxy substrate. Reduction of the manufacturing cost is limited. The glass epoxy substrate needs a certain thickness. The semiconductor chip is not able to be flip-chip mounted if the semiconductor chip does not have a certain thickness. A reduction of the height of the semiconductor device may be limited approximately 1 mm.
In accordance with the invention disclosed in Document 1, the manufacturing cost gets higher because it is necessary to form a recess on the ceramics substrate. And in accordance with the invention disclosed in Document 2, it is necessary that an insulating film should be provided according to the size of the built-in semiconductor chip. Therefore, the manufacturing cost gets higher when various kinds of the wafer level packages are manufactured. The height of the semiconductor device gets higher, because two redistribution layers are necessary and the quantity of components is large.